WASHINGTON – The Nationwide Aeronautics and House Administration’s (NASA) Jet Propulsion Laboratory in La Cañada Flintridge, Calif., has chosen Microchip Know-how Inc. of Chandler, Arizona, to develop a Excessive-Efficiency Spaceflight Computing (HPSC) processor. Microchip’s HPSC will present at the least 100 occasions the computational capability of present spaceflight computer systems. This functionality goals to advance all varieties of future house missions, together with floor missions.
Microchip will architect, design, and ship the HPSC processor over three years, with the aim of using the processor on future lunar and planetary exploration missions. Microchip’s processor structure will enhance the general computing effectivity for these missions by enabling computing energy to be scalable, based mostly on mission wants. The work will happen underneath a $50 million firm-fixed-price contract, with Microchip contributing important analysis and improvement prices to finish the venture.
“We’re happy that NASA chosen Microchip as its companion to develop the next-generation space-qualified compute processor platform.” mentioned Babak Samimi, company vice chairman for Microchip’s Communications enterprise unit. “We’re making a joint funding with NASA on a brand new trusted and transformative compute platform. It can ship complete Ethernet networking, superior synthetic intelligence/machine studying processing and connectivity help whereas providing unprecedented efficiency achieve, fault-tolerance, and safety structure at low energy consumption. We’ll foster an business extensive ecosystem of single board laptop companions anchored on the HPSC processor and Microchip’s complementary space-qualified whole system options to learn a brand new technology of mission-critical edge compute designs optimized for dimension, weight, and energy.”
Present space-qualified computing expertise is designed to deal with essentially the most computationally-intensive a part of a mission – a observe that results in overdesigning and inefficient use of computing energy. For instance, a Mars floor mission calls for high-speed knowledge motion and intense calculation throughout the planetary touchdown sequence. Nevertheless, routine mobility and science operations require fewer calculations and duties per second. Microchip’s new processor structure affords the pliability for the processing energy to ebb and circulate relying on present operational necessities. Sure processing features may also be turned off when not in use, decreasing energy consumption. This functionality will save a considerable amount of vitality and enhance total computing effectivity for house missions.
“Our present spaceflight computer systems have been developed nearly 30 years in the past,” mentioned Wesley Powell, NASA’s principal technologist for superior avionics. “Whereas they’ve served previous missions nicely, future NASA missions demand considerably elevated onboard computing capabilities and reliability. The brand new computing processor will present the advances required in efficiency, fault tolerance, and adaptability to satisfy these future mission wants.”
Microchip’s HPSC processor could also be helpful to different authorities businesses and relevant to different varieties of future house mission to discover our photo voltaic system and past, from Earth science operations to Mars exploration and human lunar missions. The processor may doubtlessly be used for industrial programs on Earth that require related mission vital edge computing wants as house missions and are capable of safely proceed operations if one element of the system fails. These potential purposes embrace industrial automation, edge computing, time-sensitive ethernet knowledge transmission, synthetic intelligence, and even Web of Issues gateways, which bridge varied communication applied sciences.